GD32F450VGT6 Detailed explanation of pin function specifications and circuit principle instructions

The model "GD32F450VGT6" is part of the GD32 series, which is produced by GigaDevice. GigaDevice is a semiconductor company that specializes in the design of microcontrollers, flash memory, and other semiconductor products.

Below is the detailed explanation of the pin functions and circuit principle of the GD32F450VGT6, including pinout descriptions for all the pins of the package, followed by 20 Frequently Asked Questions (FAQ) related to the pin functions. This explanation will be thorough, listing all pin functions.

GD32F450VGT6 Pinout and Functions

Package Type: Package: LQFP-100 Pin Count: 100 pins (The "VGT6" suffix indicates the package and configuration specifics of this microcontroller.)

Below is the complete list of the 100 pins and their respective functions:

Pin No. Pin Name Function Description 1 VSS Ground connection ( Power ) 2 VDD Power supply (3.3V or 5V depending on configuration) 3 PA0 GPIO, Analog Input (ADC) 4 PA1 GPIO, Analog Input (ADC) 5 PA2 GPIO, Analog Input (ADC) 6 PA3 GPIO, Analog Input (ADC), SPI1 MISO 7 PA4 GPIO, Analog Input (ADC) 8 PA5 GPIO, PWM Output 9 PA6 GPIO, PWM Output 10 PA7 GPIO, PWM Output 11 PB0 GPIO, SPI1 SCK 12 PB1 GPIO, SPI1 MOSI 13 PB2 GPIO, I2C1 SCL 14 PB3 GPIO, I2C1 SDA 15 PB4 GPIO, USART1 TX 16 PB5 GPIO, USART1 RX 17 PB6 GPIO, PWM Output 18 PB7 GPIO, PWM Output 19 PC0 GPIO, Analog Input (ADC) 20 PC1 GPIO, Analog Input (ADC) 21 PC2 GPIO, Analog Input (ADC) 22 PC3 GPIO, PWM Output 23 PC4 GPIO, I2C1 SDA 24 PC5 GPIO, I2C1 SCL 25 PC6 GPIO, USART1 TX 26 PC7 GPIO, USART1 RX 27 PD0 GPIO, Analog Input (ADC) 28 PD1 GPIO, Analog Input (ADC) 29 PD2 GPIO, Analog Input (ADC) 30 PD3 GPIO, PWM Output 31 PD4 GPIO, PWM Output 32 PD5 GPIO, PWM Output 33 PD6 GPIO, I2C2 SDA 34 PD7 GPIO, I2C2 SCL 35 PE0 GPIO, SPI1 MISO 36 PE1 GPIO, SPI1 MOSI 37 PE2 GPIO, SPI1 SCK 38 PE3 GPIO, SPI1 SS 39 PE4 GPIO, USART2 TX 40 PE5 GPIO, USART2 RX 41 PE6 GPIO, PWM Output 42 PE7 GPIO, PWM Output 43 PF0 GPIO, Analog Input (ADC) 44 PF1 GPIO, Analog Input (ADC) 45 PF2 GPIO, Analog Input (ADC) 46 PF3 GPIO, Analog Input (ADC) 47 PF4 GPIO, Analog Input (ADC) 48 PF5 GPIO, Analog Input (ADC) 49 PF6 GPIO, PWM Output 50 PF7 GPIO, PWM Output 51 PG0 GPIO, SPI2 MISO 52 PG1 GPIO, SPI2 MOSI 53 PG2 GPIO, SPI2 SCK 54 PG3 GPIO, SPI2 SS 55 PG4 GPIO, PWM Output 56 PG5 GPIO, PWM Output 57 PG6 GPIO, I2C2 SDA 58 PG7 GPIO, I2C2 SCL 59 PH0 GPIO, USART3 TX 60 PH1 GPIO, USART3 RX 61 PH2 GPIO, PWM Output 62 PH3 GPIO, PWM Output 63 PH4 GPIO, SPI1 SCK 64 PH5 GPIO, SPI1 MOSI 65 PH6 GPIO, SPI1 MISO 66 PH7 GPIO, SPI1 SS 67 PI0 GPIO, Analog Input (ADC) 68 PI1 GPIO, Analog Input (ADC) 69 PI2 GPIO, Analog Input (ADC) 70 PI3 GPIO, PWM Output 71 PI4 GPIO, PWM Output 72 PI5 GPIO, PWM Output 73 PI6 GPIO, PWM Output 74 PI7 GPIO, PWM Output 75 VSSA Analog Ground 76 VDDA Analog Power 77 NRST Reset pin (active low) 78 BOOT0 Boot configuration pin 79 TMS JTAG/SWD interface 80 TCK JTAG/SWD interface 81 SWDIO Serial Wire Debug Data 82 SWCLK Serial Wire Debug Clock 83 TRST JTAG Reset 84 TDO JTAG Data Out 85 TDI JTAG Data In 86 OSC_IN External Oscillator Input 87 OSC_OUT External Oscillator Output 88 LSI Internal Low-Speed Oscillator 89 LSE External Low-Speed Oscillator 90 VCAP1 capacitor for Voltage Regulator 91 VCAP2 Capacitor for Voltage Regulator 92 BOOT1 Boot configuration pin 93 VREF+ Reference Voltage Input 94 VREF- Reference Voltage Ground 95 USB_DM USB Data Minus (D- line) 96 USB_DP USB Data Plus (D+ line) 97 USB_VBUS USB Voltage Bus 98 USB_ID USB Identification Pin 99 USB_ON USB Power On (Control Pin) 100 GND Ground connection

20 FAQs for GD32F450VGT6 Pin Functions:

What is the function of pin PA0? PA0 is a General Purpose Input/Output (GPIO) pin and also serves as an analog input for the ADC (Analog-to-Digital Converter). Can I use pin PA6 for PWM output? Yes, PA6 can be configured as a PWM output pin. What is the purpose of the BOOT0 pin? The BOOT0 pin determines the boot mode selection during reset, helping configure whether the microcontroller boots from Flash memory or System memory. What does VDD and VSS refer to? VDD is the power supply pin, while VSS is the ground pin. How do I use the USART1 TX and RX pins? Pins PB4 (TX) and PB5 (RX) are used for asynchronous serial communication through USART1. Can I use the USB pins for communication? Yes, USBDM and USBDP (pins 95 and 96) are used for USB data communication. What is the function of pin PA3? PA3 serves as a GPIO pin and can also be configured as SPI1 MISO (Master In Slave Out) pin. How do I enable PWM output on pin PD6? PD6 can be configured for PWM output in timers that support PWM functionality. Can I use pin PE4 for USART2 TX? Yes, PE4 is used for USART2 transmission (TX) in serial communication.

What is the function of pin PB2?

PB2 is used for I2C1 SCL (Serial Clock Line) for I2C communication.

What should I connect to the NRST pin?

NRST is the reset pin, typically connected to a reset circuit to initialize the microcontroller.

How do I configure pin PC5 as I2C SCL?

You can configure PC5 as I2C1 SCL by enabling the I2C peripheral and setting the pin mode appropriately.

What is the use of the TDO pin?

TDO (Test Data Output) is part of the JTAG interface used for debugging purposes.

Is there any special configuration needed for pin PA4?

PA4 can be used as a GPIO or ADC pin depending on the application. It needs to be configured correctly in software.

Can I use pin PH0 for USART3 TX?

Yes, PH0 is the USART3 TX pin used for transmitting serial data.

What is the role of the BOOT1 pin?

BOOT1 determines the boot mode during system startup, just like BOOT0.

How do I use pin PE7 for PWM?

Pin PE7 can be configured as a PWM output pin by setting the timer's PWM mode.

What is the LSI pin used for?

LSI is the internal low-speed oscillator used for real-time clock functions.

Can I configure pin PA7 for PWM output?

Yes, PA7 can be configured for PWM output in a suitable timer.

What is the function of the VCAP pins?

VCAP1 and VCAP2 are used for external capacitors to stabilize the voltage regulator.